About ECCoLe Lab
Founded in May 2022, the Edge Computing Communication and Learning (ECCoLe) lab at the INRS-EMT center in Montréal, Canada, is a research facility dedicated to pioneering novel hardware architectures and computing techniques for high-efficiency edge computing.
Current research at ECCoLe primarily focuses on two key areas: (1) the design of cost-effective and energy-efficient hardware accelerators for deep machine learning methods, and (2) the development of hardware-aware deep learning model design and optimization techniques.
We take pride in our relatively small yet highly productive team, which has achieved significant progress and accomplishments in the short time since the establishment of the ECCoLe lab.
In addition to our expertise in computer architecture and advanced machine learning methods, our ECCoLe team possesses a strong foundation in wireless signal processing and maintains robust collaboration
with the telecommunications research groups at INRS-EMT. This synergy positions ECCoLe uniquely to advance research in utilizing machine learning methods within modern wireless communication systems.
Future Collaboration Plan
We actively seek to expand our collaborations with the industrial sector and other academic research teams in the following areas:
1- High-performance digital circuit design on FPGAs or ASICs.
2- Low-cost and energy-efficient hardware accelerator design for applications such as deep learning.
3- Low-complexity and cost-optimized deep learning model development, primarily for real-time Edge applications.
About The Director
Shervin Vakili joined the Énergie Matériaux Télécommunications Research Centre at the Institut National de la Recherche Scientifique (INRS-EMT) as an Assistant Professor in February 2022. He earned his Ph.D. in computer engineering from Polytechnique Montréal, Montréal, Canada, in 2014. Following his Ph.D., he continued his research in computer architecture as a post-doctoral fellow, a research associate, and a professional researcher at Polytechnique Montréal and École de Technologie Supérieure, Montréal, Canada, for more than five years. His research experience spans ASIC- and FPGA-based computer architecture design for applications in artificial intelligence, telecommunications, and computer networks. His research interests includes high-efficiency computer architectures, optimization techniques for hardware architecture design, real-time embedded systems, and Edge computing.